The Evolution of BSPDN and 2nm Technology Leading up to 2027

Samsung unveiled its latest process technologies roadmap this week at the Samsung Foundry Forum (SFF) U.S. The new plan details the evolution of Samsung’s 2nm-class production nodes through 2027, including a process technology with backside power delivery. It reiterates plans to introduce a 1.4nm-class node in 2027 and a ‘high value’ 4nm-class manufacturing tech.

Today’s key announcements from Samsung Foundry focus on its 2nm-class process technologies, set to enter production in 2025 and continue through 2027 when the 1.4-nm class production node is introduced. Samsung is also rebranding a 2nm-class node to SF2, which was previously disclosed as SF3P aimed at high-performance devices.

“We have refined and improved the SF3P, resulting in what we now refer to as SF2,” a Samsung spokesperson told AnandTech. “This enhanced node incorporates various process design improvements, delivering notable power, performance, and area (PPA) benefits.”

Samsung Foundry for Leading-Edge Nodes
Announced on June 12, 2024
Compiled by AnandTech
HVM Start 2023 2024 2025 2026 2027 2027
Process SF3E SF3 SF2
(aka SF3P)
SF2P/SF2X SF2Z SF1.4
FET GAAFET
Power Delivery Frontside Backside (BSPDN) ?
EUV 0.33 NA EUV ? ? ? ?

This represents another instance of rebranding leading-edge fabrication nodes by a major chipmaker in recent years. Samsung Foundry has not disclosed any specific PPA improvements SF3P has over SF2, only mentioning in broad terms that it will be a better-performing node than the planned SF3P.

This week’s announcement also includes new information on Samsung’s upcoming batch of process nodes planned for 2026 and 2027. In 2026, Samsung will introduce SF2P, a further refinement of SF2 incorporating ‘faster’ yet less dense transistors. This will be followed by SF2Z in 2027, which adds backside power delivery for improved power quality. Specifically, Samsung aims to address voltage drop (aka IR drop), a persistent issue in chip design.

Interestingly, SF1.4, a 1.4nm-class node, is also scheduled for 2027. However, it does not appear to feature backside power delivery. This would make Samsung the only foundry not using BSPDN for their first 1.4nm/14Å-class node based on current roadmaps.

“We have optimized BSPDN and incorporated it for the first time in the SF2Z node announced today,” the spokesperson told us. “We will continue to refine this technology and apply it to future nodes, but we don’t have a specific timeline to share at this time.”

Chip Fab Roadmaps for Leading-Edge Nodes
Data announced during conference calls, events, press briefings and press releases.
Compiled by AnandTech
HVM Start 2023 2024 2025 2026 2027
Intel Process Intel 3 Intel 20A Intel 18A Intel 14A Intel 10A
FET FinFET RibbonFET (GAAFET)
Power Frontside PowerVia (BSPDN)
EUV 0.33 NA EUV 0.55 NA EUV + DSA
Samsung Process SF3E SF3 SF2 SF2P/SF2X SF2Z/SF1.4
FET GAAFET
Power Frontside Backside/?
EUV 0.33 NA EUV ? ? ?
TSMC Process N3E/N3P N3S/N3X N2 A16 A14 (?)
FET FinFET GAAFET
Power Frontside Super Power Rail (BSPDN)
EUV 0.33 NA EUV ?

Compared to other contract fabs, Samsung’s roadmap is now roughly aligned with the industry on ‘nanometer’ designations. However, without further technical details from Samsung, it remains unclear what the actual benefits will be for each node and how they compare to predecessors, or to Intel Foundry and TSMC.

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